1. Field of the Invention
The present invention generally relates to a semiconductor circuit having a test function and, more particularly, to a semiconductor circuit capable of performing a test function using only a small number of pads.
2. Description of the Prior Art
FIG. 1 is a configuration diagram showing a conventional semiconductor circuit 100 having a test function.
As can be seen in FIG. 1, the conventional semiconductor circuit 100 having a test function includes a first circuit block 110, a first power control block 120, and a second circuit block 130.
The first circuit block 110 includes a circuit for performing the main function of the semiconductor circuit 100. The first power control block 120 functions to control the supply of power to the first circuit block 110. The second circuit block 130 includes a circuit for performing a function of testing the semiconductor circuit 100, thus enabling the semiconductor circuit 100 to be tested.
More specifically, the conventional semiconductor circuit 100 having a test function is operable in a normal mode in which the first circuit block 110 is normally operated or in a test mode in which the second circuit block 130 is normally operated.
First, in the normal mode, a first pad PAD1 is supplied with a supply voltage VDD and a second pad PAD2 is grounded (GND). In this case, the operation of the second circuit block 130 is controlled in such a way that the supply of power to the second circuit block 130 is interrupted by applying a control signal through an external additional second control pad CON_PAD2 so that the supply of power to the second circuit block 130 is interrupted.
Further, in the test mode, the second pad PAD2 is supplied with the supply voltage VDD and the first pad PAD1 is grounded. In this case, the operation of the first circuit block 110 is controlled by applying a control signal through an additional first control pad CON_PAD1 so that the supply of power to the first circuit block 110 is interrupted.
That is, the conventional semiconductor circuit 100 having a test function needs the additional control pads CON_PAD1 and CON_PAD2 and the control signals in addition to the first pad PAD1 and the second pad PAD2 for power supply, and thus an additional circuit is required.
FIG. 2 is a diagram describing a pad limit.
As can be seen in FIG. 2, when the number of pads increases, the area required to arrange the pads must be secured, and thus the area S2 of a semiconductor chip increases due to such a pad limit. That is, even if the area S1 required to perform the substantial function of the semiconductor chip is small, the area S2 of the semiconductor chip increases when the number of pads increases. An increase in the semiconductor chip area S2 directly results in an increase in cost.